On August 19, the journal Science published an online research paper by a team led by Professor Miao Xiangshui and Associate Professor Ye Lei from Wuhan National Laboratory for Optoelectronics and the School of Optical and Electronic Information at Huazhong University of Science and Technology. The paper was titled “2D materials-based homogeneous transistor-memory architecture for neuromorphic hardware”.
It has been the dream of human beings to realize brain-like intelligence for a long time and to discover the key for it’s brain-like neuromorphic hardware. Miao Xiangshui and Ye Lei’s team cooperated with scholars from the Shanghai Institute of Technical Physics at the Chinese Academy of Sciences, Wuhan University, Zhejiang University and Chinese University of Hong Kong to break through the performance bottleneck of information exchange between information sensing, storage and computing. They creatively proposed a homogeneous transistor memory architecture and new brain-like neuromorphological hardware, which will make a significant influence on non von Neumann computing systems and brain-like intelligence integrating sensing, storage and computing of the future.
Miao Xiangshui and Ye Lei’s team’s group photo
In order to realize the brain-like neuromorphological computing in memory hardware, the memory array usually needs to be connected with the peripheral circuit. This is because the signal processing is required before and after the implementation of in memory computing. However, there are differences between the device structure of memory and that of peripheral circuits, which leads to the physical separation of memory and peripheral circuits. Device integration and mutual coupling limit the design of brain-like chips. With the continuous reduction of device size, the impedance matching between them hinders the realization of high-performance and energy-efficient brain computing.
Constructing memory and peripheral circuits with the same device structure is expected to break through the above bottleneck. As an excellent infrared intelligent sensing material, two-dimensional materials can build rich memory structures. A new method of sensing-storage -computing integration by coupling two-dimensional materials with ferroelectric nearest neighbors is proposed in this paper. On the one hand, the fixed ferroelectric polarization is equivalent to a nonvolatile gate electric field, which electrically dopes the two-dimensional material channel, so as to construct PN junction, bipolar junction transistor (BJT) and other devices for constructing peripheral circuits. On the other hand, the polarization reversal modulation of ferroelectric domain can change the built-in barrier in the junction region of BJT, which can be used to build nonvolatile memory and improve the high-low resistance ratio to realize in memory computing.
In this paper, a single device consists of multilayer tungsten selenide (WSe2) channels, periodically polarized lithium niobate (LNO) medium, emitter (E), collector (C), base (B) and gate (G) under base. The LNO media under E、C and B electrodes have upward, downward and upward (PU-PD-PU) polarization distribution respectively, which constitutes n-p-n doping for WSe2.When G is grounded, the device functions as a BJT. Multiple BJTs are connected to build operational amplifiers, which can realize the functions of analog signal amplification, addition operation, integration operation, voltage comparison and so on. When E and B are grounded, the polarization direction of LNO below the base region is changed through the gate voltage. The polarization distribution of Pu-PD-Pu and Pu-Pu-Pu is in high resistance state and low resistance state respectively, realizing the nonvolatile storage function.
Fig. 1 Principle and device structure of homogeneous transistor memory architecture
Because the operational amplifier and memory unit used in the peripheral circuit adopt the same device structure, the neuromorphological hardware based on homogeneous transistor memory architecture can be constructed directly. Through this hardware, the classification of number and letter patterns are realized theoretically and experimentally. At the same time, a new three state content addressed memory (TCAM) unit with 2T2R (two transistors and two memristors) structure is realized with the homogeneous transistor memory architecture, which can be applied to large-scale parallel date addressing. Based on the homogeneous transistor memory architecture, this paper also proposes a three-dimensional integrated structure, which draws extremely important academic significance and application prospects for promoting the industrialization and application of new neuromorphological hardware based on two-dimensional materials.
Fig. 2 the binary classification algorithm is implemented by neuromorphological hardware based on homogeneous transistor memory architecture
Fig. 3 2T2R TCAM cell based on homogeneous transistor memory architecture
Huazhong University of science and technology is the primal affiliation of the paper. Tong Lei, doctor of the School of Optical and Electronic Information in Huazhong University of Science and Technology, is the first author. Ye Lei, associate researcher of School of Optical and Electronic Information in Huazhong University of Science and Technology, and Hu Weida, researcher of the Shanghai Institute of Technical Physics of the Chinese Academy of Sciences, are co-corresponding authors. Professor Miao Xiangshui, Professor Zhang Xinliang, Professor Xiong Wei, Professor Xue KanHao from the Wuhan National Laboratory for Optoelectronics and the School of Optical and Electronic Information in Huazhong University of Science and Technology, Professor Xu Jianbin of Chinese University of Hong Kong, associate researcher Wang Peng and associate researcher Xia Hui of Shanghai Institute of Technical Physics of the Chinese Academy of Sciences, Professor Xu Mingsheng of Zhejiang University and associate professor Liu Feng of Wuhan University participated in the research work. The research work is supported by the National Natural Science Foundation of China, national key R & D projects, Hong Kong Research Grants Council, key research projects of Frontier Science of the Chinese Academy of Sciences, etc.
Miao Xiangshui ’s team has long been engaged in the research of phase change memory chip and memory computing integrated memristor technology. In 2018, the first memristor monograph “Introduction to memristors” was published. In 2019, the team licensed 93 three-dimensional phase change memory chip patents to Changjiang storage company and cooperated to develop products, and established a joint laboratory in cooperation with industry leading enterprises such as Huawei, Xinsi technology company and Changjiang storage company. This is promoting the achievement transformation of memory chip technology and the exploration of leading technology in the future.
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Written by: Tong Lei
Edited by: Scott, Peng Yumeng